High Power/High Frequency Waveform Measurement
Discussion of Skills
Making measurements of electric circuits operating at high power and frequency can be extremely challenging. Along with the over issue of ensuring measurements are made safety, many factors compound at high power and frequency to make measuring waveforms difficult. The challenges that arise fall dominantly into two categories:
- Managing Stray Impedances
- Noise Mitigation
I have worked extensively in this area and have developed a strong understanding, and intuition, for how to make measurements on nanosecond timescales. Below is an attempt at a general description of issues that may arise, and basic techniques for their mitigation. I also co-authored a document for EHT that discusses step-by-step considerations for making high-frequency measurements, which can be seen on the EHT website, entitled High Voltage Nanosecond Pulse Measurement Techniques.
On short timescales, the transient effects of stray reactive (inductance and capacitance) components often can't be ignored. At lower frequency or DC the effects are negligible, but they have a profound effect on the waveform of nanosecond pulses. Assume, for example, the stray inductance of the output leads of the supply is about 400nH, which is approximately a loop with a 6-inch diameter. Then, lets say the output leads and the load of a total capacitance of 10pF, which is a small dielectric barrier discharge experiment, maybe 1cm square. This results in a LC ringing frequency of f = 1/(2*pi*sqrt(LC)) ~70MHz. This quarter-period rise time of this is about 4ns, which is right on par with the ideal rise time of the one of our nanosecond pulsers. If the output leads are spread far apart, increasing the stray inductance, the LC frequency will decrease to the detriment of the waveform rise-time.
As a result, it's important to carefully design test setups to reduce stray elements. Often it's a game of intuition, rather than just taking the correct steps. A standard method for dealing with stray inductance of twin leads cabling is to form a "twisted-pair", which minimizes stray inductance and reduces inductive pickup noise. This also, however, maximizes stray capacitance and defines the impedance of the cabling. In many situations this may not be an issue, but it points to the fact that given any particular operating condition, knowing which stray elements to maximize, minimize, and balance requires an understanding of the macroscopic functionality of the supply.
While the above discussion applies to system design as well as measurement, these stray components particularly come into play in the latter. This is because the stray impedances of the measurement devices will affect the waveform, and it can be hard to deconvolute this effect from the true waveform. A simple example is that high-voltage differential probes may have an stray capacitance of 2pF. If measuring with a 5kOhm resistive voltage divider, the rise time on the probe is RC = 10ns. As a result, this setup would not be able to measure any features faster than 100MHz.
At its core, managing stray impedances comes down to two different things:
- An understanding of the effective stray impedances of all components in a experimental setup setup. This includes individual components, as even many resistors are capacitive/inductive on short timescales. It also includes stray reactances due to wire layout, current paths, proximity of components at different potentials, etc.
- Given these stray impedances, consideration of all relevant timescales RC, L/R, sqrt(LC), V=L*dI/dt, I=C*dV/dt, etc
Noise Elimination and Pickup Reduction
In addition to stray reactive elements, noisy environments can create spurious measurements by interacting with the experimental setup or instrumentation. Wire leads can pick up signals from stray EM waves, which can appear like real signals. Even the bodies of probes themselves, if not well-shielded, can fall victim to electromagnetic interference, or EMI. Further, even having two objects at different voltages near each other can result noise due to capacitive coupling: a sort of "cross-talk" in which the two objects at disparate potentials act as a capacitor, and currents flow between the to charge the capacitance of the system.
Eliminating these issues can be as or more challenging than managing stray impedances. Simply applying noise mitigation techniques may help, but these same techniques may also distort the waveforms if not considered carefully. Standard techniques include the
- Application of metal foils for additional shielding
- Application of ferrites on power and signal cables for high-frequency signal rejection
- Proper termination of all signal cables
- Appropriate experimental setup to minimize capacitive coupling between components at different potentials
- Elimination of ground loops, and an understanding of the extent to which grounds are truly connected or inductively separated
- Use of differential probes with low stray impedances and high common mode rejection ratios